Minotaur Labs ESD and Latch-Up Standards
ESD and Latch-Up Standards
Below is a summary of some of the ESD and latch-up standards which are used in the electronics industry. Rather than simply being a list of standards, some comments will be made about each of the standards to help guide the reader to the standard’s relevance and importance. At the end of this summary are links to where the standards are available.
Types of ESD Standards
There are three types of ESD Standards and Test Methods:
- Device level test methods which characterize devices such as integrated circuits and transistors for their ability to survive ESD stress, usually in a manufacturing environment intended to reduce the severity and frequency of ESD events
- System-level ESD test methods which characterize systems such as computers and mobile phones for their ability to survive the ESD stress they will be subjected to during routine use
- ESD control standards which specify how to control the level and severity of ESD events in a manufacturing environment
Minotaur Labs specializes in the first of the above standards, device level testing, but the relevant standards for each type of document will be presented here for context. Links to the relevant standards bodies are listed at the bottom of this page for information on how copies of these standards may be obtained.
ESD Device Testing
Human Body Model (HBM)
HBM is intended to replicate a charged person discharging through a sensitive device. Minotaur Labs can perform ESD testing for any of these standards.
This HBM test method is issued jointly by JEDEC and the Electrostatic Discharge Association (ESDA) and replaces separate HBM standards issued by the two organizations up to 2009.
This HBM standard was issued by JEDC, but is no longer supported since the joint JEDEC/ESDA HBM standard was issued. There are however still numerous references to this standard in the electronics industry.
This HBM standard was issued by ESDA but is no longer supported since the joint JEDEC/ESDA HBM standard was issued, but this standard is still reference regularly in the electronics industry.
AEC - Q100-002 REV-E
This HBM standard is issued by the Automotive Electronics Council as part of the Q100 series of reliability tests for integrated circuits. It references ANSI/ESDA/JEDEC JS-001 for stress waveforms and basic testing procedures but has additional requirements for product intended for automotive applications.
AEC – Q101 -001A
This HBM standard is issued by the Automotive Electronics Council as part of the Q101 series of reliability tests for discrete semiconductor devices. This test method does not yet reference JS-001 but still references JESD22-114 and ASI/ESD STM5.1 for the stress waveforms and basic test procedures.
EIAJ ED-4701/300 Test Method 304
This HBM standard is issued by JEITA, the Japan Electronics and Information Technology Industries Association. The basic stress in this test method is the same as that in JS-001.
This HBM standard, issued by IEC (International Electrotechnical Commission) is a reissue of JS-001 after being accepted by a vote of IEC member countries. (Note: this document sells for 270 Swiss Francs (about 270 US dollars) on the IEC web site, but a usually more up to date version of JS-001 is available free of charge on the JEDEC and ESDA web sites.)
MIL-STD-883 Test Method 3015
This military standard is the original HBM test method. It includes some updates for some tester parasitics but not the updates to pin combinations present in JS-001.
Charged Device Model (CDM)
The CDM test is intended to simulate a charged device, such as an integrated circuit, discharging to a grounded circuit. Most ESD engineers believe this is the most relevant ESD test for manufacturing in an automated assembly line.
This CDM test method is issued jointly by JEDEC and the Electrostatic Discharge Association (ESDA) and replaces separate CDM standards issued by the two organizations up to 2013. Minotaur Labs will be implementing this test method in the near future.
This JEDEC standard has been the most popular CDM test method for many years and is the standard used for CDM testing at Minotaur Labs. Since the release of ANSI/ESDA/JEDEC JS-002 JEDC is no longer updating this standard but its use is still widespread in the industry.
This CDM standard was issued by ESDA but is no longer supported since the release of ANSI/ESDA/JEDEC JS-002. Testing to the AEC CDM standard still references this standard for the basic equipment setup, although a change to referencing JS-002 is expected in the near future.
AEC - Q100-011
This CDM standard is issued by AEC and is part of the Q100 series of reliability tests for integrated circuits. As of July 2018, this CDM standard references the ANSI-ESD S5.3.1 CDM standard for its basic setup while adding additional requirements for product intended for automotive applications. It is expected that an updated version of the AEC CDM standard will be issued soon which will reference ANSI/ESDA/JEDEC JS-002 for its basic setup and procedures.
This CDM standard is issued by AEC and is part of the Q101 series of reliability tests for discrete semiconductor devices. As of July 2018, this CDM standard references the ANSI-ESD S5.3.1 CDM standard for its basic setup while adding additional requirements for product intended for automotive applications. It is expected that an updated version of the AEC CDM standard will be issued soon which references ANSI/ESDA/JEDEC JS-002 for its basic setup and procedures.
EIAJ ED-4701/300 Test Method 305
This CDM test method is issued by JEITA and differs considerably from the CDM methods issued by JEDEC and ESDA. The JEITA CDM method uses a method of direct charging rather than the field induced method employed by the JEDEC and ESDA standards. Stress levels from this test method should not be considered equivalent to those from JS-002.
The IEC CDM method is a reissue of JS-002 after being accepted by a vote of IEC member countries, except that an Annex was added to include the JEITA CDM test method. (Note: this document sells for 240 Swiss Francs (about 240 US dollars) on the IEC website but JS-002 is available free on the JEDEC and ESDA websites.
Machine Model (MM)
The machine model was originally developed in Japan to provide an HBM like test without going to the high voltages required for HBM testing. The name Machine Model was given to the test later with a mistaken believe that it represented stress from ESD events during manufacture. In fact, CDM is a better test for the types of stress seen during manufacture. MM is no longer a recommended ESD test since it has very little added value over HBM. Minotaur Labs can provide MM testing services if there is a need but does not recommend MM testing on a regular basis. The following MM documents are included only for completeness.
This was the JEDEC MM standard but it is no longer available on the JEDEC web site. JEDEC document JEP172A, issued in conjunction with ESDA explains the reasons for not continuing to test using MM.
The ESDA version of the MM is still available on the ESDA web site. ESDA document JTR5.2, issued in conjunction with JEDEC explains the reasons for not continuing to test using MM.
AEC - Q100-003 - Rev-E & AEC - Q101-002 - Rev-A
The MM was a mainstay for automotive qualification for many years but today the AEC’s MM documents for integrated circuits (Q100) and discrete semiconductors (Q101) are both listed as “Decommissioned” on the AEC website and are not available for download.
Transmission Line Pulse (TLP)
Transmission line pulse or TLP is not a qualification test for integrated circuits like HBM and CDM but is a diagnostic test. Standardized test methods have been written, however, to ensure that tests performed by different laboratories will have comparable results.
ANSI/ESD STM 5.5.1-2016
This document is issued by ESDA and covers the full range of TLP pulse widths and rise times. Earlier version discussed only 100 ns pulse lengths or pulse lengths shorter than 10 ns.
The IEC TLP document is largely a reissue of an early ESDA TLP test method which only deals with 100 ns long pulses.
Human Metal Model (HMM)
Human Metal Model or HMM refers to an ESD event from a person holding a metal object such as a screwdriver or key to a grounded object. The waveform is based on the IEC 61000-4-2 system level ESD stress, to be presented below, but applied to an electronic component such as an ESD protection device or integrated circuit pin intended for direct connection to a system input or output.
This standard practice presents a method for stressing electronic components with a waveform which is the same as the system level ESD test IEC 61000-4-2. This method should be considered a “Best Practice” since it has not been proven to provide reproducible results to date.
This IEC document provides a suite of tests for CAN bus transceivers for electromagnetic compatibility (EMC) and includes an ESD test. This test provided some of the ideas behind the ANSI/ESD SP5.6 test method.
System Level ESD Testing
System level ESD testing searches for vulnerability in a finished electronic system such as a computer or mobile phone to the types of ESD stress they are likely to experience during normal use. The tests are usually performed with hand held stress generators, commonly known as ESD guns. As opposed to device level ESD testing which only looks for physical damage system level ESD testing also looks for system upset.
This standard test method is issued by IEC and is the most widely used system level ESD test and is used on a wide variety of products. Most other system level ESD tests are based on this standard in some way and most use the ESD guns specified in IEC 61000-4-2 or use modifications of the pulse source specified in IEC 61000-4-2.
This system level test is issued by International Organization for Standardization and is intended for automotive applications. The standard not only defines ESD testing on completed automobiles, but also defines tests on modules intended for automotive applications.
This standard is issued by RTCA, Inc., (formerly known as Radio Technical Commission for Aeronautics) and includes ESD testing for aviation electronics. It uses the same pulse source as defined in IEC 61000-4-2.
Control of the severity and frequency of ESD events in electronic manufacturing, test and development is critically important. The following standards discuss how to control the severity and frequency of ESD tests in a manufacturing environment.
The ESDA’s S20.20 document is possibly the most widely used document for the implementation of ESD control programs in manufacture. In addition to describing how to implement an ESD control program S20.20 also requires qualification of many of the products used as part of an ESD control program such as wrist straps, work surfaces, flooring etc. ESDA also maintains a set of standards and test procedures for the qualification and evaluation of ESD control products.
Note: S20.20 is available for free download but there are charges for the supporting documents describing individual test methods.
This JEDEC document is an alternative document for the development of an ESD control program but does reference a number of the ESDA test methods for ESD control products.
The IEC 61340 series of standards includes general descriptions of ESD handling issues, guidance on the setting up of and ESD control program, a user guide as well as document describing how to characterize ESD control products such as wrist straps, work surfaces and garments. It is largely a reissue of ESDA’s S20.20 document with some modifications.
This JEDEC standard is the most widely used standard for the testing of latch-up.
The IEC latch-up test method is largely based on an earlier version of the JEDC latch-up standard JESD78. It does however include qualification tests for the latch-up test
Accessing ESD Standards
All of the relevant ESD standards organizations maintain web sites where electronic versions of the standards are either available for free download or purchase. Some standards bodies also offer paper versions of the standards for purchase.
Electrostatic Discharge Association
The joint JEDEC/ESDA test methods for HBM and CDM and the factory control document S20.20 are available for free download. Technical Reports are available free of charge for ESDA members and there is a member discount for other ESDA documents.
JEDEC has changed is policy on the cost of standards. In the past all JEDEC standards were free for download but there was a charge for paper copies. Today there is a charge for electronic copies of many standards, although JEDEC member companies can still obtain free downloaded standards. The HBM and CDM standards are still available for free download but there is a charge for the latch-up standard for non JEDEC members.
Automotive Electronics Council
All AEC standards are available for free download.
International Electrotechnical Commission
There is a charge for all IEC standards
A large number, maybe all, military standards can be downloaded here. The search functions may not always be the best so it is best to have the document number available. Finding the appropriate document number may be easier using some of the popular search engines.