This is the first in a series of posts that I plan on Transmission Line Pulse (TLP) testing. TLP has become the measurement tool of choice for ESD design engineers exploring circuit properties in the ESD time and current domain. Some of the topics I plan to discuss are listed below.
- Why Transmission Line Pulse? (this post)
- What is a transmission line?
- Reflections, the core and challenge of TLP measurements
- Types of TLP systems and controlling reflections
- Load lines in TLP measurements
- Transient TLP measurements
- TLP on powered devices
- Calibration and verification
In this introductory post I will first describe the problem that TLP solves and then discuss how TLP is used.
2 Information for the ESD Protection Designer
Consider the predicament of a circuit designer tasked with designing ESD protection for an integrated circuit (IC) in a new technology. The starting point for IC design is a knowledge of the properties of the technology. The starting point for most IC designers is the model files that describe the properties of the technology’s transistors, diodes, capacitances, and resistances as well as other parameters of the technology such as breakdown voltages and absolute maximum values specified by the technology developers. This information is insufficient for the ESD protection designer. The available information is perfect for designing an input/output (IO) buffer intended to sense voltages between 0 and 3.3 V or drive 10s of mA continuously. It is not sufficient for human body model (HBM) protection design where the IO needs to sustain an amp of current for about 100 ns, or for the case of charged device model (CDM) where the IO needs to sustain several amps of current for a ns. The situation is even worse if the IO is intended for an external system IO such as USB or HDMI where currents can be 10s of amps and last 60 ns.
The designer needs to know the properties of the technology for currents in the multi amp range but for short times. The normal measurement systems to characterize integrated circuit technologies mostly deal with currents below an amp, and if pulse measurement capability is available the pulse lengths are on the order of many microseconds, not the nanoseconds of an ESD event. Tim Maloney and his co-authors provided what would prove the be the measurement system of choice, transmission line pulse (TLP), in a pair of landmark papers in 1985 [1,2].
A source of multi-amp, short duration pulses can be remarkably simple. A length of co-axial cable, a transmission line, charged to a voltage can produce a multi-amp pulse whose amplitude depends on the charging voltage and the duration depends only on the length of the cable. Implementing this into a usable measurement system is not trivial, explaining why commercial TLP systems are much more expensive than a length of coax cable. The development of this simple pulse source into highly capable measurement systems has proven invaluable for the ESD design community. Other posts in this TLP series will discuss details of TLP systems and measurements. This post will discuss how TLP is used, providing motivation for the following posts in the series.
3 Using TLP Systems
Figure 1 shows an idealized TLP system. The system consists of a length of coaxial cable which can be charged to a high voltage (HV). An RF relay can disconnect the center conductor from the HV supply and connect it to a coaxial cable leading to the device under test (DUT). A current probe and a voltage probe on the high side of the DUT allow the capture of the current through the DUT and voltage across the DUT by a high-speed oscilloscope. Figure 1 captures the essence of a TLP system. What it lacks is control of reflections, which complicates TLP system design but will be discussed in later posts. This simplified system will provide the necessary background for understanding how TLP systems are used.
Figure 1 Ideal view of a pulse measurement system for ESD characterization
One of the prime outputs of TLP measurements is a current versus voltage curve (IV) of a circuit element or protection structure in which each IV point is measured during a single TLP pulse. This is explained in Figure 2. A pulse is captured by the digital oscilloscope and the voltage and current are averaged over a measurement time window, usually late in the pulse. Each pulse provides one data point. TLP measurements are usually started with a low charging voltage and after each pulse the charging voltage is increased, mapping out an IV curve as shown in the right half of Figure 2.
Figure 2 Each TLP pulse is used to create a single I-V point. Repeated pulses, each at a higher charging voltage allows the creation of a full IV curve.
Averaging within a measurement window improves the accuracy of a TLP measurement by removing noise in the measurement. The window is usually chosen late in the pulse for two reasons. TLP systems are high speed measurement systems and unless extreme care is used in their construction there is often ringing or other artifacts near the beginning of the pulse which are not characteristic of the DUT. The initial part of the pulse may also include transient characteristics of the DUT which are best investigated after a good understanding of the quasi-static properties of the DUT.
In the last sentence of the preceding paragraph, I stuck in a word that may have been missed but is especially important, “quasi-static”. TLP IV curves are measured after initial transients, but before significant device heating can occur. This is what sets TLP IV curves apart from what can be measured with traditional current and voltage measurement equipment, device characteristics at high current levels can be determined before significant self-heating.
How much current and voltage a circuit element can survive during an ESD event is crucial information in ESD design. For this reason, most TLP systems include DC leakage measurement circuitry, not shown in Figure 2. After each TLP pulse the system can apply a low DC voltage, usually between 0.5 V and 5 V to look for device degradation. The leakage measurements are often displayed on the same plot as the IV curve using a unique method illustrated in Figure 3. In addition to the standard x axis for voltage and y axis for current a secondary x axis is added for leakage. The leakage measured after each TLP pulse is plotted using the secondary x axis. The y axis position for the leakage measurement is the measured TLP pulse current just proceeding the leakage measurement. This allows the visualization of the development of leakage as the stress current is increased. In the example in Figure 3, leakage is unchanged up to the fourth from the highest current TLP pulse. During the last three pulses the leakage increases after each stress. In this example the increase in leakage is also accompanied by a change in device behavior during the TLP stress. It is not always the case that device damage is accompanied by a change in the TLP IV characteristics.
Figure 3 TLP IV curve with accompanying leakage measurements
TLP can also be used to look at time dependence and transients. In its most simple form, the measurement window shown in Figure 2 can be made narrow relative to the width of the pulse and IV curves can be extracted using measurement windows at two or more positions within the pulse.
In some TLP systems it is possible to directly measure the voltage and/or current pulses as a function of time to observe phenomena such as turn on time. Most TLP systems include rise time filters so that the effect of rise time during a stress pulse can be determined. This will be discussed in future posts.
TLP is the primary tool of the ESD protection designer for understanding device properties in the ESD range of time and currents. It is also used extensively in failure analysis, both for ESD and EOS issues. The more the measurement technique is understood the better the data from it can be understood and its full potential can be realized. As discussed in the Introduction, future blog posts will go into some of the details of TLP systems and how they can be used.
 Maloney, T. and Khurana, N., “Transmission line pulse technique for circuit modeling and ESD phenomena”, EOS/ESD Symposium Proceedings, 1985.
 Khurana, N, Maloney T., Yeh, W, “ ESD on CHMOS Devices – Equivalent Circuits, Physical Models and Failure Mechanisms”, 23rd International Reliability Physics Symposium, 1985.